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IISc Researcher’s New Transistor Design – Breakthrough in Chip Technology

Prof. Mayank Shrivastava of the Indian Institute of Science, Bangalore has invented and demonstrated a new transistor design, which can lead to a breakthrough in future chip technology. The proposed transistor has significantly better performance and scalability as compared to the technology used in current computer and cell phone chips. The invention was recently patented by IISc and related results were subsequently published by him and his PhD student K. Hemanjaneyulu.

Transistor is the basic building block of all electronic chips. Over several decades transistors have become smaller and smaller, which has resulted into denser, cheaper, sleeker and high performing chips, as predicted by Moore’s law. It is the continuous scaling of these transistors; we see consistent improvement in speed and power consumption of wireless and handheld devices. Without continuous scaling laptops, tablets and cell phones were never possible.

“Transistors used in today’s laptop, cell phones, tablets and computer chips are called FinFETs, which has been adapted by major technology giants like Intel since 2011. However, FinFET’s performance had been predicted to deteriorate if scaled below 10nm, which is expected to happen by 2018. This means it is a high time for breakthrough in transistor technology, as also highlighted by industry veterans, if we want chip technology not to stall beyond 2018. In other words an out of the box transistor design is the need of the day if we want consistent improvement in computer chips, mobile phones and other wireless devices after year 2018”, commented Prof. Shrivastava.

Since it takes time for a new technology to go from prototype to mass production, semiconductor industry feels that the newer design must be in line with current day manufacturing technology. In the multibillion dollar semiconductor industry, any abrupt change in structure and manufacturing process of devices is prohibitively expensive. The solution we need for future is supposed to have fundamentally different mechanism of operation; however, it must have manufacturing process same or at least similar to current FinFET technology. This will ensure smooth and an economically viable transition to the new solution; which however, was not easy to achieve.

The device patented by Prof. Shrivastava in a nutshell can make use of existing FinFET based chip manufacturing facilities and process; however, unlike FinFETs, it uses vertical tunnelling and hetro junction for electron transport. Published results depict that this breakthrough transistor technology can significantly improve the chip performance and it’s scalability beyond 10nm technology node. Moreover, the newer design works at lower voltages and draws 15 times less charge in idle state, which also ensures longer battery life.

Prof. Shrivastava has a patent on this new technology. He is confident that this device is best in class for future ultra-dense and low-power system on chip applications.

Prof Mayank Shrivastava is an Assistant Professor, Department of Electronic Systems Engineering, Indian Institute of Science, Bangalore. He can be reached at +91-80-2293-2732.

 

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